Special Mode # 1: 3 State OutputsWhen the SYSCLK pin is held high for 256 RCLK periods, all output pins, including the parallel port are 3-stated.
Special Mode # 2: Allow Access Between Framer and LIU on Transmit SideWriTIng 40hex to the TEST resister will invoke this mode. When enabled, the internal TLINK node is TIed to the TSER pin. This access is useful in applications where it is desired to purposely corrupt the data stream before it is to be transmitted out onto the E1 line via TTIP and TRING pins. There is an exact delay from the TSER pin to the bipolar outputs of the formatter so the user has the ability to know when the needed bits appear at RCLK and RLINK pins. This delay is 5 TCLK periods.
Mode 2: DS2153 Special mode to allow access to transmit bipolar data.
Special Mode # 3: Tap the Transmit "Receive Bipolar Data StreamSetting the 60hex in the TEST2 register will invoke this mode. When enabled, the internal TLINK node is tied to the TSER pin.
Mode 3: DS2153 Special mode to tap the transmit "receive bipolar data.
Special Mode # 4: Allow Separate Transmit and Receive Backplane Clocks Setting the CCR3.2-bit in the Common Control Register 3 will invoke this mode.
Mode 4: DS2151 Special mode to allow asynchronous backplane clocks.
NOTE: When using Special Mode # 4 and polling data on a multi-frame boundary, an external elastic store (DS2175) should be used instead of the transmit side elastic store of the DS2153. The internal elastic store built into the DS2153 can not release data on a multi-frame boundary. A DS2175 has the ability to sync on multi-frame pulses and therefore should be used instead.
Special Mode # 5: LIU BypassSetting the 20 hex bit in the TEST2 register will invoke this mode. When enabled, the internal TLINK node is tied to the TSER pin.
Mode 5: DS2151 Special mode to bypass the LIU.
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