The AVR has three timing counters, where the timer counter 0 and the timer counter 2 are 8 bits, and the timer counter 1 is 16 bits.
In learning AVR timing counters, just beginning to be a lot of registers to engage in a little dizzy, and then seriously read the relevant registers in the Datasheet first read again, and then re-see the contents of the timer counter to clarify. Here's a summary, deepen your impression.
Timer counter 0 and timer counter 2 are basically the same. The timing counter 0 is used to summarize the differences between its several operating modes.
Normal mode: No introduction, and it is exactly the same in 51.
CTC mode: When the register TCNT0 and OCR0 are equal (ie, match), OC0 changes (set, clear or negate) according to the value of COM0[1:0]. At the same time, when TCNT0 is cleared, TCNT0 restarts counting from 0x00, and a match occurs when the count result is equal to the value in the next OCR0 register. When a match occurs, the match comparison flag OCF0 is set, that is, OCF0=1, a match comparison interrupt may be applied.
Fast PWM mode: When register TCNT0 and OCR0 match, OC0 is set or cleared according to the value of COM0[1:0]. Unlike the CTC mode, TCNT0 is not cleared but continues counting until the count is 0xFF, at which point OC0 will be cleared or set. At the same time, TCNT0 resumes counting from 0x00, and a match occurs when the count result is equal to the value in the next OCR0 register. OCF0 will not be set when there is a match with the CTC mode. When TCNT0 counts to 0xFF, the count overflow flag TOV0 is set, that is, TOV0=1. At this time, an overflow interrupt can be requested.
Phase-adjustable PWM mode: In this mode, the timer counter is a bidirectional counter (additional or decrementable), which is added from 0x00 to 0xff, and from 0xff to 0x00 on the next count pulse. When COM0[1:0] = 2, in the process of adding, if there is a match, clear OC0; in the process of subtracting, if a match occurs, set OC0. (When COM0[1:0]=3, it is the opposite of COM0[1:0]=2). Unlike the fast PWM mode, when the TCNT0 counts to 0xff, it does not affect the OC0 output. Instead, OC0 changes when the value of the next OCR0 register matches from 0xff to 0x00 (addition process). Clear, then it should be set.) When the timer counter counts to 0x00, the count overflow flag TOV0 is set, ie TOV0 = 1, an overflow interrupt may be requested at this time.
The above several operating modes are suitable for timing counters 0, 1, and 2 at the same time. Only the function of timer counter 1 is enhanced. This will be discussed below.
When I look at a program on Tuesday, that program is working in fast PWM mode and selects the count overflow interrupt. At the time, I also wondered why I didn't choose to match interrupts and waited till the count overflows. It didn't take time to interrupt, but I also asked the teacher how stupid it now seems! The fast PWM mode does not have a matching interrupt at all!
Timer counters 0 and 2 are adjustable in frequency and phase in CTC mode. In PWM mode, the frequency is not adjustable. It can be seen by the frequency counting company. Both the CTC and the PWM can adjust the duty cycle by adjusting the OCRn value. (The calculation formula for generating the PWM wave frequency will be given later. About the various registers of the timer counter, you can see the Datasheet yourself.)
The following is a summary of the enhancements for timing counter 1 to 0 and 2:
1) Timer counter 1 has many enhancements over 0 and 2. In the PWM mode, a PWM wave with adjustable frequency and phase can be generated. At this time, 8-bit timers 0 and 2 cannot be used because the timer counter 1 has an input capture function, ie, it has an input capture register ICR1. In PWM mode, a top value can be stored in ICR1, which means that this top value can change the PWM wave frequency. This can be seen in the frequency calculation company.
2) The timing counter 1 has two output comparison units and two output comparison registers OCR1A and OCR1B, so two PWM waveforms with the same frequency and different duty ratios can be generated at the same time. The adjustment of the duty cycle is of course determined by OCR1A and OCR1B. Waveforms are output on the OC1A and OC1B pins.
3) The timer counter 1 has an input capture unit. Can accurately record the time of the external event. The signal that captures the external event is input by pin ICP1. When the input capture signal is generated, the count value in TCNT1 will be written to the input capture register ICR1 (ICR1H, ICR1L). The input capture signal can also be triggered by the output signal of the analog comparator's ACO unit. There are two ways to trigger, when the sixth bit in the control register B of the timer counter 1 (ie, TCCR1B) is ICSE=0, the falling edge triggers; the ICICE=1, the rising edge triggers. When the trigger condition is met, the input capture unit begins to capture the occurrence of this event. Use this function to measure the input waveform frequency. If I'm not mistaken, then there is also a timer counter in 51. This can be done with the GATE gate bit set. In 51, set GATE, then the start of the timer counter is determined by the INTX (X=0 or 1) pin and TRX (X=0 or 1). The TRX can be set first, so that the start condition of the timer count is still missing INTX high (that is, letting INTX be low), waiting for INTX to go high, then the timer counter starts, wait until the INTX becomes When it is low, the timer counter is turned off again, then the count value of the timer counter is a PWM pulse width.
Suddenly thought of here in the AVR, the timer counter has its own divider, here you can also set the timer counter start conditions are met, but set to no frequency, this time is equivalent to people without a heart, timing The counter is not working at this time. The timer counter can be divided when other conditions (such as an external interrupt) are met.
Just talking about interrupts, unlike 51, the AVR writes "1" to this bit when the interrupt flag bit is cleared to "0". That is, AVR clears the interrupt flag bit by software and writes "1". It is worth reminding that when setting the interrupt register, it is better to clear the interrupt flag first, and then immediately set the corresponding interrupt enable control bit value to "1".
It is also necessary to explain here that the timing counter waveform output pin and the input capture pin mentioned above, before use, must first set its direction register is output or input. If it is an input, it is also necessary to consider whether a pull-up resistor is required.
Having said so much, I almost forgot what I think is more important. Timer counter 1 is 16-bit, and each of its 16-bit registers is equipped with an 8-bit TEMP register, which is used to temporarily retain the upper 8-bit data of the register. When the MCU reads data from the 16-bit register, the lower 8 bits are sent to the MCU at the same time, and the upper 8 bits are sent to TEMP. When the MCU reads the upper 8 bits, it takes the data in TEMP. When data is written from the MCU to the 16-bit data register, the upper 8 bits are written to TEMP. When the lower 8 bits are written, the lower 8 bits and the upper 8 bits of TEMP form 16 bits of data and are written to the 16-bit register. When you read, you read the lower 8 bits first and then read the upper 8 bits. When you write, you write the upper 8 bits and then the lower 8 bits.
Finally, the setting method of three kinds of working modes of the timer counter is usually given (taking timing counter 1 as an example):
Normal mode:
1. Set the clock source as required, ie set the control register TCCR1B.
2. Determine the initial value of the timer is written to the data registers TCNT1H and TCNT1B according to the timing time and the clock source.
3, set the interrupt bit.
4, select the interrupt number, write an interrupt service routine. Pay attention to the need to reload initial values ​​written to TCNT1H and TCNT1B (same as 51) in the interrupt service routine!
CTC mode:
1. If the waveform is output, set the port OC1A or OC1B to the output mode.
2. Set the waveform generation mode and select the desired clock source, TCCR1B.
3, set the output mode, that is, TCCR1A.
4, according to the need to set the upper limit value (mentioned above) is written to the output compare register OCR1A.
5, calculate the frequency according to the formula.
Fast PWM mode:
1. If the waveform is output, set the port OC1A or OC1B to the output mode.
2, set the PWM waveform mode, select the desired clock source, namely TCCR1A and TCCR1B.
3. Set the frequency of the waveform, ie OCR1A.
4. Set the waveform duty cycle, which is OCCR1B.
6, according to the frequency formula to calculate the frequency.
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