ã€Jensen Technology Selects RISC-V Series IP Products Developed by UltraSoC for Product Development Acceleration and Debugging Enhancements】 UltraSoC announced that Asia’s leading and mature CPU IP supplier, Andes Technology ) UltraSoC advanced embedded analysis technology has been adopted to support its AndesCore series RISC-V processor. Jingxin Technology will use the unique SoC product line of UltraSoC, including the industry's only commercial RISC-V processor tracking solution, to accelerate development and debugging of its complex application embedded products, including artificial intelligence (AI). , computer vision, network controllers and storage.
The two companies will jointly present a complete set of RISC-V developments at the upcoming RISC-V Conference (RISC-VWorkshop, to be held at the Technical University of Catalonia, Spain, May 7-10). Debugging and tracking the design process.
UltraSoC currently exclusively offers a commercial RISC-V development environment that includes system-on-chip (SoC) analysis, processor trace, and other options that can be used to meet end-user needs. As a pioneer in the industry, UltraSoC developed the RISC-V processor tracking technology in 2017 and soon followed its tracking specification to the RISC-V Foundation for use as part of the Foundation's standardization efforts. The company is still fully committed to supporting the operation-control/debugging of RISC-V Foundation standards and proposes a processor trace format, which is proposed in the company's comprehensive development strategy including ARM, Cadence/Tensilica, CEVA and MIPS. Any processor architecture provides integrated debug and development solutions.
Jingxin's cores are based on the high-performance AndeStarTM V532 and 64-bit architecture. The partnership with UltraSoC will enable customers to select and integrate advanced embedded analysis functions when using the Andes V5N25 and NX25 processors. Customers using Crystal Core's high-performance 32-bit and 64-bit processor cores can use UltraSoC's SoC analysis and debug IP in addition to the RISC-V processor trace capability. These functions are combined to give the SoC design The division brings full visibility to not only observe the performance of the kernel, but also to observe the operation of the entire system.
Jingxin Technology has adopted RISC-V as AndeStarV5, its fifth-generation processor architecture, and released two high-end processors in its AndesCoreTM series of configurable processor IP series: 32-bit N25 and 64-bit. NX25. Both products are based on RISC-V, and their actual performance exceeds 3.4 CoreMark/MHz, while the number of logic gates is as low as 30K (N25) and 50K (NX25), respectively, and the highest clock in TSMC's 28nm HPC process The clock frequency is 1.1GHz. The N25 and NX25 are ideal for high-speed control tasks, and users can benefit from the UltraSoC embedded intelligence available to them after selecting any of these cores.
Shin Sui-mo, chief technology officer and senior vice president of R&D at Grace Technology, said: "Because of its exceptional performance/power ratio, flexible configuration and comprehensive support tools, the N25 and NX25 AndesCore processors are widely used by our customers. Selecting UltraSoC as the preferred partner in the field of embedded analysis, tracking and verification will provide our customers with a state-of-the-art development environment that includes internal operations and processors on the SoC without disturbing the target's behavior. The in-depth observation of the implementation situation, UltraSoC has proved that it is committed to the development of the RISC-V ecosystem, so it is clearly the best partner of our V5RISC-V architecture.We are pleased to work together with many common customers. Crystal's Andes N25/NX25 processor and UltraSoC's IP and tracking solutions are used to meet their demanding applications."
Rupert Baines, CEO of UltraSoC, stated: "We are pleased to be able to work with Gexin Technology on its innovative RISC-V processor core and to work together to help both of our mutual customers leverage the advantages of its leading V5 AndeStar architecture and enable customers to utilize UltraSoC. SoC analysis and debug IP and processor traceability to fully understand the system to achieve the design."
RISC-V is an open instruction set architecture that was quickly adopted extensively after it was originally developed by the University of California, Berkeley. UltraSoC and Epistar Technologies are active members of the RISC-V Foundation and have played an active role in the development of RISC-V. Both companies have participated in all RISC-V conferences and will also participate in the 8th RISC-V Conference in Barcelona.
UltraSoC is committed to providing an optimal tool to help designers of complex systems perform high-value, in-depth observations of hardware and software performance at the same time. This kind of observation tracking can cover the entire electronic system. Especially important is the observation and analysis function. Can play a role in the actual operation of the product, not just in the design phase; the resulting benefit is that it can significantly improve its security, protection capabilities, performance and power consumption. Designers can monitor and understand the situation when the hardware and software work together and fine-tune the system even after the chip has been implanted into an overall system design. Using UltraSoC's embedded analytics technology can reduce development costs by 25% and achieve significant cost savings and create competitive advantages in avoiding redesigns and shortening time to market.
24V Charger,24V Ebike Charger,Electric Charger For Motor,24V Battery Charger
HuiZhou Superpower Technology Co.,Ltd. , https://www.spchargers.com